[00:00:00] Speaker 03: First is number 241312, Micron Technology versus Netlist Inc. [00:00:06] Speaker 03: Mr. Ruckheim. [00:00:09] Speaker 03: Yeah, you're on. [00:00:10] Speaker 01: Oh, good. [00:00:11] Speaker 01: Sorry, you're on. [00:00:11] Speaker 01: I missed that last part. [00:00:12] Speaker 01: I did hear the case name that I am part of that case. [00:00:15] Speaker 01: My name is Mike Ruckheim. [00:00:17] Speaker 01: I'm arguing for the Micron Appellates. [00:00:19] Speaker 01: And I hope everybody had a happy holiday. [00:00:21] Speaker 01: And I'm ready to begin when the court is. [00:00:25] Speaker 01: Go ahead. [00:00:26] Speaker 01: May it please the court. [00:00:28] Speaker 01: This case is stemming from two IPR proceedings, the 744 from the 744 petition and the 745 petition. [00:00:36] Speaker 01: And I'll take the arguments in numerical order unless the panel wishes otherwise. [00:00:42] Speaker 01: The question for the 744 proceeding is one of claim construction, which is court reviews de novo. [00:00:48] Speaker 01: The question is, what does the claim term specified data rate mean? [00:00:54] Speaker 01: Micron identified in its petition [00:00:56] Speaker 01: that the term has a broad meaning, simply that it means the module has a constrained or set rate. [00:01:04] Speaker 01: And there's no dispute that the Halbert prior art here sets a rate of twice the rate of the registered DIM, the registered DIM being the prior art described in Halbert's figure two. [00:01:16] Speaker 01: But Micron went further in its reply in response to Netlist's argument that the claim requires a single numerical value [00:01:25] Speaker 01: It showed how Halbert discloses a one-to-one data, pieces of data per strobe rate, both at the module, at the rank, and throughout the system. [00:01:40] Speaker 01: And specifically, I would direct the panel to Appendix 1973, where Micron identified that Halbert discloses this rate because it uses the same clock rate as the DQS, which stands for data something strobe, [00:01:55] Speaker 02: strobe that clocks the data out of the memory module and throughout the circuitry. [00:02:14] Speaker 01: The way this is actually played out is in our petition, we identified that Halbert does disclose a set or constrained data rate, which is a specified data rate. [00:02:22] Speaker 01: It sets a data rate of two module outputs per one rank output per command. [00:02:28] Speaker 01: It also just states that the rate is twice the rate of the prior art DIMM memory module. [00:02:34] Speaker 02: For purposes of understanding, [00:02:37] Speaker 02: Halbert in the pen disclosed different data rates. [00:02:41] Speaker 02: One is, Halbert is one, and under the pen is two bits, let's say. [00:02:50] Speaker 01: Well, so we identified under a broad interpretation of the term. [00:02:54] Speaker 01: Halbert sets the data rate, but we also said even under netlist interpretation that you have to have a single number, a per-clock unit number. [00:03:02] Speaker 01: Halbert discloses this single number because it discloses one piece of data exiting the rank per every data strobe. [00:03:10] Speaker 01: And then you see in Halbert's figures four and I believe five, there's a shift in the data strobe size such that the module itself, the larger [00:03:19] Speaker 01: let's say, printed circuit board, is also outputting one piece of data per data strobe. [00:03:25] Speaker 04: I don't understand the answer. [00:03:27] Speaker 04: I mean, I'm looking at Halbert Figure 4, and it seems to me as it's anodated data rate 1, 2, and 1 and 2, the data rates are not the same. [00:03:40] Speaker 04: So how do you get, I guess you're agreeing the data rates have to be the same? [00:03:46] Speaker 01: We do agree that the preamble reference to specified data rate means a specified data rate for the module itself. [00:03:53] Speaker 01: So it provides antecedent basis for the later term specified data rate. [00:03:57] Speaker 01: So they have to be the same? [00:03:58] Speaker 01: We agree they have to be the same. [00:03:59] Speaker 01: So how are they the same in Figure 4? [00:04:02] Speaker 01: Sure. [00:04:03] Speaker 01: With respect to Halbert's Figure 4, you have, let's see, Halbert Figure 4 [00:04:09] Speaker 01: You have ranks 140 and 142. [00:04:12] Speaker 01: And then you really have to look at Halbert's figure five to see the timing of those ranks. [00:04:18] Speaker 01: And you see that the two ranks emit data, one piece of data on DQ0, DQ1 in reference to these two strobes RDQ1 and RDQ0. [00:04:31] Speaker 01: So that's a one-to-one relationship of data per strobe from the rank. [00:04:36] Speaker 01: And then when you get down to the output of the module, that's the last two lines in figure five. [00:04:42] Speaker 01: And it's a one-to-one relationship between the DQ, which is your data line, and DQS. [00:04:49] Speaker 01: So you're moving from the same rate to a ratio? [00:04:53] Speaker 01: Rate just means ratio. [00:04:54] Speaker 01: Rate means per. [00:04:56] Speaker 01: Rate does not mean per clock cycle. [00:04:58] Speaker 01: It's really memory bus clock cycle. [00:05:01] Speaker 01: But the board concluded otherwise. [00:05:03] Speaker 01: The board did conclude otherwise in its claim construction, and we believe that claim construction is in error, and there's a number of reasons why. [00:05:10] Speaker 01: The first is that the 314 patent does not disclose or define, as this court requires, that the term specified data rate means pieces of data per memory bus clock cycle. [00:05:22] Speaker 01: We have an admission from their expert. [00:05:23] Speaker 03: The ordinary meaning would be per clock cycle. [00:05:26] Speaker 01: Well, the order and meaning of rate itself outside of the, just in general, just a plain order and meaning just means a ratio, a per. [00:05:35] Speaker 01: And then we have netlist expert admitting that the rate had the term specified data rate has no definite meaning in the art, no special industry meaning that would eliminate the pieces of data per clock cycle. [00:05:47] Speaker 01: And then I will direct the court. [00:05:48] Speaker 04: So if we disagree with that, your board's correct, right? [00:05:53] Speaker 04: We disagree with the statement you've just made. [00:05:56] Speaker 01: that Netlist expert admitted that there's no special industry meaning here. [00:06:02] Speaker 01: If data rate means per clock cycle, you lose. [00:06:06] Speaker 01: If data rate means per memory bus clock cycle, we lose on this issue. [00:06:12] Speaker 01: We don't believe that is the case. [00:06:13] Speaker 01: It's not defined in the 304. [00:06:15] Speaker 01: Netlist expert shows the opposite. [00:06:17] Speaker 01: And then the Halbert Prior Art itself states, and this is at, hold on a second. [00:06:29] Speaker 03: This argument seems to be sort of contrived in the sense that you're comparing it to the strobe rate and the strobe rate is different from the multiplexer to the controller and from the ranks to the multiplexer, right? [00:06:44] Speaker 03: Well, the strobe, the data per... No, just answer my question. [00:06:48] Speaker 01: I believe they're the same. [00:06:49] Speaker 01: The data per strobe rate throughout the system is the same. [00:06:51] Speaker 03: But the strobe, but the, compare, compare, because the strobe rate's different. [00:06:56] Speaker 01: Because the strobe has a shift at the module output, so it maintains a one-to-one relationship throughout the system from the ranks of modules. [00:07:04] Speaker 03: As I understand it, the strobe rate, or whatever you want to call it, is different from the controller to the multiplexer to the controller and from the ranks to the multiplexer, right? [00:07:17] Speaker 01: The strobe size. [00:07:19] Speaker 01: The size which maintains the one-to-one date piece which is how you how you get to the argument that there's a one-to-one ratio Exactly your honor exactly right seems rather odd It seems odd, but we have a couple things going for us here number one We can look at the extrinsic evidence here Halpert itself says and this is that appendix 91 [00:07:43] Speaker 01: I'm sorry, this is Appendix 1343, paragraph 58 of Halbert. [00:07:47] Speaker 01: It expressly says that the illustrated examples use source synchronous strobe signals to clock data. [00:07:55] Speaker 01: It also says, but common clock signaling can also be used in some embodiments. [00:07:59] Speaker 01: What does this mean? [00:08:00] Speaker 01: There's two different ways to clock data. [00:08:02] Speaker 01: One is to use data strobes. [00:08:04] Speaker 01: One is to use common clock cycles. [00:08:06] Speaker 01: The 3 and 4 patent did not limit to either different way. [00:08:09] Speaker 01: Halbert itself explicitly states there's two different ways to do this. [00:08:13] Speaker 01: The other way to know is netless expert admitted it. [00:08:15] Speaker 01: We asked netless expert. [00:08:16] Speaker 04: But if we just, let's start with the intrinsic evidence and namely the claim language. [00:08:21] Speaker 04: They use specified data repeatedly. [00:08:23] Speaker 04: It's specified data rate, right? [00:08:25] Speaker 04: It's not just data rate, it's specified data. [00:08:28] Speaker 04: Correct. [00:08:28] Speaker 04: Meaning, and the board, I understand the board, you can correct me if I'm wrong, the board construed that as being the same data rate. [00:08:37] Speaker 04: It's singular and not plural. [00:08:39] Speaker 04: They look at other uses in the claims with the, [00:08:43] Speaker 04: when they're drafting claims and they use a first and a second data right. [00:08:47] Speaker 04: So if you just look at the intrinsic evidence, that's supportive of how the board construed the claim, correct? [00:08:53] Speaker 01: No, Your Honor. [00:08:54] Speaker 01: Well, two things there. [00:08:55] Speaker 01: One, the board did have a claim construction section where it construed the claim, as Your Honor said. [00:09:00] Speaker 01: But if you look at how the board applied that construction, it's important. [00:09:03] Speaker 04: So are you agreeing with, I know you've got another argument about how they applied it differently. [00:09:09] Speaker 04: But as to that construction, [00:09:12] Speaker 04: that the specified data rate is the same data rate throughout the use of that term in the claims. [00:09:17] Speaker 04: Do you agree with that? [00:09:18] Speaker 04: I do agree with that. [00:09:19] Speaker 04: Then say they misapplied it, or do you not agree with that statement? [00:09:23] Speaker 01: I agree with that. [00:09:24] Speaker 01: I agree that the board construed it that way, but also added... My question isn't whether they construed it that way. [00:09:29] Speaker 04: The question is whether you agree with that construction, but you're arguing that they just misapplied it, or whether you disagree with that construction. [00:09:37] Speaker 01: I agree with that construction if that construction is that the preamble provides antecedent bases for the remainder so that you have a one-to-one relationship or just a constraint. [00:09:47] Speaker 01: You're not answering my question. [00:09:49] Speaker 04: It may construe specified data rate to refer to the same data rate. [00:09:55] Speaker 04: Do you agree with that? [00:09:57] Speaker 01: I agree. [00:09:59] Speaker 04: The same data rate. [00:10:00] Speaker 04: They have to be the same data rate. [00:10:02] Speaker 01: Yes. [00:10:02] Speaker 04: And then you're saying they mis-supplied it because they didn't allow for ratios and so forth? [00:10:08] Speaker 01: They added to that construction by limiting the construction to pieces of data per common clock cycle. [00:10:15] Speaker 03: What is it in the specification that supports your notion that specified data rate is referring to a ratio? [00:10:23] Speaker 03: In particular, this ratio between the data rate and the [00:10:29] Speaker 01: Absolutely. [00:10:31] Speaker 01: There's two different things. [00:10:32] Speaker 01: One, the specification doesn't limit to just data per common clock. [00:10:37] Speaker 01: And instead, it actually, the only time it discusses rate, it says the word DDR, which stands for double data rate, which both sides agree means data per strobe edge. [00:10:47] Speaker 01: So the only discussion in the 314 pattern relates to data per strobe. [00:10:51] Speaker 01: The claim language itself, when it uses the term rate. [00:10:53] Speaker 01: Where do they tie the data per strobe to the specified data rate? [00:10:59] Speaker 01: It does not discuss specified data rate outside the claim. [00:11:04] Speaker 03: Okay. [00:11:06] Speaker 03: Okay. [00:11:06] Speaker 03: You want to talk about your second issue? [00:11:09] Speaker 01: Yes, Your Honor. [00:11:10] Speaker 01: The last thing is, I don't know if I mentioned it, but... Let me clarify something. [00:11:16] Speaker 02: The specified data rate, it's a rate that has to be the same throughout the module, let's say. [00:11:24] Speaker 01: That is correct, Your Honor, and we identified the two ways. [00:11:28] Speaker 01: constrains the data rate for the module. [00:11:30] Speaker 01: That's the broadest interpretation. [00:11:32] Speaker 01: And the second is there's a one-to-one rate throughout the module of data per stroke. [00:11:37] Speaker 01: And Netlist expert, and just to finish this up, appendix 2131 admitted that when you have DDR devices, which is disclosed in Halbert, and disclosed in 3.4. [00:11:46] Speaker 02: Let's go back. [00:11:47] Speaker 02: So Halbert discloses a different data rate than what's disclosed, say, under the patent. [00:11:55] Speaker 01: It's the same data rate. [00:11:56] Speaker 01: They both disclose DDR devices with a double pieces of data per strobe rate. [00:12:02] Speaker 02: Doesn't Helbert disclose data rate at like one bit? [00:12:05] Speaker 01: Halbert also disclosed that you can have one bit, one piece of data coming out of each rank versus two pieces of data coming out of the module. [00:12:14] Speaker 01: And that only makes that board focused on under its interpretation of pieces of data per common clock cycle. [00:12:22] Speaker 02: The difference is that one is expressed as a non-concurrent and the other is expressed as a concurrent flow. [00:12:29] Speaker 01: There's absolutely that because the board did make a factual determination that Halbert disclosed the concurrent [00:12:34] Speaker 01: and non-concurrent mode. [00:12:36] Speaker 02: But the real issue for the 745 petition is... That's really the basis or the point here we're discussing with respect to Section 103. [00:12:45] Speaker 01: That's with respect to the 745 petition. [00:12:47] Speaker 01: I think that's correct, Your Honor. [00:12:49] Speaker 01: Okay. [00:12:49] Speaker 01: Yeah. [00:12:50] Speaker 01: For the 744, it's mostly just what does this term mean? [00:12:52] Speaker 01: Is it limited to just pieces of data for memory bus clock cycle? [00:12:55] Speaker 01: And the 304 patent doesn't support that. [00:12:57] Speaker 01: And all the evidence to the contrary shows that it can also be limited to pieces of data per strobe. [00:13:02] Speaker 01: Going to the 745 petition, which I know we have less time now for, the primary question for the 745 is, did the board implement the flexible obvious test as required by the KSR opinion? [00:13:16] Speaker 01: And no, the board implemented an overly rigid. [00:13:20] Speaker 01: That doesn't help me that much. [00:13:22] Speaker 03: Where is their disclosure in Halbert? [00:13:29] Speaker 03: of non-active signals. [00:13:32] Speaker 03: I mean, you say disclosures in Figure 2, right? [00:13:36] Speaker 03: You would combine Figure 2 and Figure 4, right? [00:13:39] Speaker 01: Absolutely, Your Honor. [00:13:40] Speaker 01: So there's a couple things. [00:13:42] Speaker 01: There's a disclosure of active and non-active chipslet signals generally in Halbert's Figure 2. [00:13:48] Speaker 01: We also pointed out that the industry standard here, the JEZ-V21C industry standard for the DRAM devices that are disclosed in Halbert, specifically says that you have chipslet signals. [00:13:59] Speaker 01: And so this is not an obvious showing where we have to look at some dusty reference located abroad in the filing cabinet. [00:14:05] Speaker 03: But you can have chip selection and two active signals. [00:14:09] Speaker 03: Chip selection doesn't necessarily imply non-active signals. [00:14:13] Speaker 01: Well, Halbert actually, Figure 2, does show active and non-active chip selects. [00:14:18] Speaker 04: And that's the prior art. [00:14:20] Speaker 04: But what about Figure 4? [00:14:22] Speaker 04: Figure 4 doesn't say. [00:14:24] Speaker 04: The board said that it would contradict the claim language in Figure 4. [00:14:28] Speaker 01: Well, there's two issues there, Your Honor. [00:14:30] Speaker 01: One, just going to the board statement that Your Honor just referenced. [00:14:34] Speaker 01: That statement, this brings up the Parker vision case. [00:14:37] Speaker 01: The board focused on Halbert's concurrent mode when it also made a factual finding that Halbert had a non-concurrent mode. [00:14:44] Speaker 01: And so in doing so, by only focusing on the concurrent mode as a way to... Why would you have a non-active signal in Halbert? [00:14:54] Speaker 03: They distinguish the prior art, which has a non-active signal. [00:14:58] Speaker 03: to active ranks and it's alternating, the multiplexer is alternating between the two of them. [00:15:05] Speaker 03: So why would you have a non-active signal? [00:15:07] Speaker 03: I'm not understanding. [00:15:09] Speaker 01: Sure. [00:15:09] Speaker 01: You would have a non-active signal for the non-concurrent mode in Halbert, which the board found actually exists. [00:15:15] Speaker 03: That's the prior art. [00:15:16] Speaker 03: That's not Halbert itself. [00:15:18] Speaker 01: No, the board is discussing how the memory module itself. [00:15:21] Speaker 01: This is the Hubbard's inventive memory module. [00:15:23] Speaker 01: I believe it's 200 or 100. [00:15:25] Speaker 01: It can be configured to have this non-contourant mode just because Hubbard discusses that the ranks will emit. [00:15:33] Speaker 03: I'm not understanding what you're saying. [00:15:35] Speaker 03: What part of the board's decision are you referring to? [00:15:38] Speaker 01: Sure. [00:15:38] Speaker 01: This is where the board mentions generally. [00:15:54] Speaker 01: It says, this is at appendix, page 15 of the board's final written decision. [00:16:00] Speaker 01: 16. [00:16:01] Speaker 01: 15. [00:16:02] Speaker 01: 15. [00:16:04] Speaker 01: The board says, as discussed above, Halbert's figure five shows ranks operating concurrently. [00:16:10] Speaker 01: This is not to say that Halbert cannot be configured to operate with active and non-active signals, such that the ranks do not act concurrently. [00:16:19] Speaker 01: And the board cites the evidence for that. [00:16:22] Speaker 02: And that's a factual finding. [00:16:24] Speaker 01: This is a factual finding that's not being disputed on appeal. [00:16:27] Speaker 01: The net list is not appealed. [00:16:28] Speaker 01: This factual finding by the board and this factual finding is entitled to substantial deference. [00:16:32] Speaker 04: Okay, here's how I understood the board's analysis. [00:16:36] Speaker 04: If Figure 4 were to be modified as you proposed, then all the requested data would not be delivered to the memory controller. [00:16:44] Speaker 04: So the module would not work much less achieve the increased memory throughout which Figure 4 was designed. [00:16:51] Speaker 04: Do you agree or disagree with that? [00:16:53] Speaker 01: I do disagree. [00:16:56] Speaker 01: We agree that the module will not work for its concurrent mode operation, but Halbert has two modes, and under Parker revision you have to look at both. [00:17:04] Speaker 03: No, Halbert doesn't have two modes. [00:17:06] Speaker 03: The prior art has one mode, and Halbert itself has a different mode. [00:17:10] Speaker 01: Well, this is what the board found. [00:17:12] Speaker 01: It's on page 15 of the opinion that... That doesn't help. [00:17:16] Speaker 03: What's the appendix reference? [00:17:17] Speaker 01: 30? [00:17:40] Speaker 01: That is 30, Your Honor. [00:17:45] Speaker 03: And what language you rely on? [00:17:47] Speaker 01: The paragraph starts with as discussed above. [00:17:50] Speaker 01: Right. [00:17:50] Speaker 01: It says Halbert's figure five shows ranks 140 and 142 operating concurrently. [00:17:55] Speaker 01: This is not to say Halbert cannot be configured to operate with active and non-active signals. [00:18:03] Speaker 01: The main issue here is that we identified a strong motivation to combine [00:18:08] Speaker 01: Chip select signals generally with Halbert's Figure 4. [00:18:11] Speaker 01: One is just to be compliant with the industry standard. [00:18:14] Speaker 01: One is to select from the two different ranks. [00:18:16] Speaker 03: The problem is that Halbert has a multiplexer. [00:18:22] Speaker 03: having a non-active signal in connection with a multiplexer doesn't make sense, right? [00:18:28] Speaker 01: Your Honor, we identified that the chip select signals can be sent with the address command through the multiplexer to the ranks, and it has not been argued by the other side that having chip select signals with the multiplexer does not make sense. [00:18:39] Speaker 01: In fact, the other side didn't rebut our showing at all that a FACETA would be motivated to combine. [00:18:45] Speaker 03: The board here relied on the signals [00:18:48] Speaker 03: the non-active signals not being received by the ranks, right? [00:18:54] Speaker 01: The board said that having non-active signals being received by ranks would not allow for the concurrent mode to operate. [00:19:02] Speaker 03: Yeah. [00:19:03] Speaker 01: Yes. [00:19:03] Speaker 01: But what the board didn't do and what Netlist did not do is dispute that it's very obvious to add chip select signals generally could be active-active to Halberd's Figure 4 based on the Figure 2 and based on the industry standard. [00:19:16] Speaker 01: That's unrebutted. [00:19:17] Speaker 03: I don't understand how a multiplexer operates if you've got a non-active signal. [00:19:23] Speaker 01: Well, the way that Halberd's figure 4 describes it responds to read operations, it says that its memory controller responds to read operations just like the Priorit would. [00:19:32] Speaker 01: Priorit receives active and non-active chixalic signals from the host that communicates with the memory module. [00:19:38] Speaker 01: It's receiving these signals and it passes them through just like a normal memory controller would. [00:19:42] Speaker 01: However, we've identified in our reply that it's a simple design choice of whether to select from one or both ranks concurrently or not concurrently. [00:19:51] Speaker 01: As I mentioned, there's no rebuttal at all to the fact that one of scale would be motivated to combine chip select signals because it's part of the industry standard and we're talking about industry-specified DDR DRAM devices. [00:20:03] Speaker 01: They didn't dispute that. [00:20:05] Speaker 01: The board didn't address that. [00:20:06] Speaker 01: It only focused rigidly, overly rigidly on whether it made [00:20:10] Speaker 01: whether active and non-active signals, whether there's a motivation combined for those. [00:20:15] Speaker 01: And that wasn't the question. [00:20:17] Speaker 01: The question is adding in chip select signals that was unrebutted. [00:20:20] Speaker 01: And I can reserve the remaining of my time. [00:20:23] Speaker 03: We're out of time. [00:20:23] Speaker 03: We'll give you two minutes for rebuttal. [00:20:25] Speaker 03: Thank you, Your Honor. [00:20:26] Speaker 03: Thank you. [00:20:27] Speaker 03: Mr. Milliken. [00:20:41] Speaker 00: Thank you, your honors and may it please the court, I will pick up where my friend left off with the figure to figure for issue. [00:20:49] Speaker 00: The board did not find and indeed micron did not even argue below that figure for discloses a non concurrent mode of operation. [00:21:00] Speaker 00: What Micron argued is that you would combine figure two and figure four and specifically combine figure two's disclosure of both active and non-active chip select signals in order to make figure four operate non-concurrently. [00:21:17] Speaker 00: And the problem with that, as the board identified at appendix 30, the passage that your honors were just discussing with my friend, is that the board said, sure, Halbert does not preclude [00:21:29] Speaker 00: Operating figure four non concurrently but obviousness concerns, not only whether a skilled artisan could do something, but also would be motivated to do that thing and the problem here. [00:21:41] Speaker 00: is that there was no motivation to modify Figure 4 to operate it non-concurrently because that would defeat the whole purpose. [00:21:48] Speaker 00: The purpose of Halbert is to allow slower memory devices to operate with a faster memory controller. [00:21:57] Speaker 00: And the only way that you can do that is if you are operating both the ranks of memory devices at the same time. [00:22:04] Speaker 00: you're sending two pieces of data at once, they get serialized by the multiplexer, and then they go out twice as fast at half the width to the memory controller. [00:22:15] Speaker 04: Was there any testimony in the record by their part, by an expert saying you're wrong about that? [00:22:20] Speaker 04: Was that disputed? [00:22:24] Speaker 00: Their expert argued [00:22:27] Speaker 00: very generally that it would have been obvious to incorporate chip select signals from figure two into figure four. [00:22:35] Speaker 00: Our expert responded and said no that would not be obvious and you can see this testimony at appendix 1778 to 1784. [00:22:44] Speaker 00: Our expert said no it would not make sense to use the active and non-active chip select signals of figure two and figure four [00:22:51] Speaker 00: Because if you did that, you would simply return the inventive embodiment of figure four back to the thing that Halbert was trying to improve upon. [00:23:00] Speaker 00: And their own expert, in his deposition, he conceded that this modification would, quote, degrade Halbert. [00:23:08] Speaker 00: Figure four was trying to solve a problem with figure two, and Micron's obviousness theory relied on changing figure four in order to reintroduce that very problem. [00:23:17] Speaker 03: The board relied on... Did the board say that it agreed with your expert? [00:23:21] Speaker 00: The board did credit our expert's testimony. [00:23:25] Speaker 00: If you take a look at Appendix 29, the board said at the end of the first paragraph that Halbert's [00:23:35] Speaker 00: memory module outputs data to the system memory data bus at twice the rate that each of the ranks 140 and 142 outputs data. [00:23:44] Speaker 00: And then they cite our expert's testimony and they refer to it as credible. [00:23:50] Speaker 00: And then they go on and they cite his test. [00:23:54] Speaker 00: Well, but the analysis continues. [00:23:56] Speaker 00: Dr. Schabelsky testifies, the board says, that Halbert operates multiple memory ranks concurrently to increase bandwidth of the memory system. [00:24:05] Speaker 00: The board says that it credits that testimony. [00:24:08] Speaker 00: And then on the discussion spanning from Appendix 30 to Appendix 31, [00:24:14] Speaker 00: The board explains that if you were to use active and non-active signals in Figure 4, you would eliminate Figure 4's ability to do this thing that it was designed to do. [00:24:27] Speaker 03: But in that specific point, they didn't credit your expert or refer to your expert. [00:24:33] Speaker 00: It is correct that in the specific passage from Appendix 30 to Appendix 31, they do not cite the expert's testimony. [00:24:40] Speaker 00: But the expert's testimony can be [00:24:43] Speaker 00: found, as I said earlier, at appendix 1778 to 84, and the board expressly credited our experts' testimony about how Halbert worked. [00:24:52] Speaker 00: And under the APA, I believe that's sufficient to allow for affirmance on substantial evidence grounds. [00:25:00] Speaker 00: If I'm happy to answer any other questions on the motivation to combine issue, otherwise I'll go back to specified data rate. [00:25:11] Speaker 00: So Micron, both below and on appeal, has framed its arguments on claim one as turning on the meaning of the word specified in specified data rate. [00:25:22] Speaker 00: But the board didn't construe specified because it didn't need to. [00:25:26] Speaker 00: The board relied on very straightforward antecedent basis principles to conclude that whatever specified means, every instance of specified data rate in the claims is referring to the same rate. [00:25:39] Speaker 00: And I think my friend. [00:25:40] Speaker 04: And your friend is agreeing to that or not agreeing to that? [00:25:44] Speaker 00: I understand. [00:25:45] Speaker 00: That's what I was about to say. [00:25:46] Speaker 00: I understand that he agrees that each instance of the rate has to be the same. [00:25:53] Speaker 03: And the way they get around what the board is saying is that they say the board didn't consider that a ratio is a rate and the ratios are the same. [00:26:08] Speaker 03: And I would argue make two different arguments about ratios, only one of which they mentioned this morning. [00:26:15] Speaker 00: Correct. [00:26:15] Speaker 00: They have two arguments about ratios. [00:26:17] Speaker 00: One of their arguments is that Halbert has a constant specified data rate because the rate of data transfer at the interface to the controller is always twice the rate of data transfer at the interface to the ranks. [00:26:32] Speaker 00: That's what I understand their first argument to be. [00:26:35] Speaker 00: I understand they didn't mention that this morning. [00:26:39] Speaker 00: Well, then I'm happy to not address it unless your honor set questions on that one. [00:26:43] Speaker 03: I'm just trying to confirm. [00:26:44] Speaker 03: That's my understanding. [00:26:46] Speaker 03: They made the second argument about the ratio with the straw. [00:26:51] Speaker 00: So I understood my friend's reference to Halbert disclosing a data rate of twice the rate of the registered DIM. [00:26:58] Speaker 00: I understood that to be another way of making their ratio argument that I just articulated, but I confess that [00:27:07] Speaker 00: I find the argument somewhat difficult to parse, and so I may be misunderstanding. [00:27:12] Speaker 00: I'll address, though, the argument about the strobe cycle that my friends spent a significant amount of time on. [00:27:18] Speaker 03: They're really... They say that the ratio of the data to the strobe signal is the same because there's a stronger strobe signal between the multiplexer and the controller than there is between the ranks and the multiplexer. [00:27:32] Speaker 00: Right? [00:27:33] Speaker 00: Right. [00:27:33] Speaker 00: And the reason that that argument fails is because it doesn't make any sense in the context of the claims. [00:27:39] Speaker 00: The claims require that not just data signals but also strobe signals be sent at the specified data rate. [00:27:47] Speaker 00: It would not make sense to use the strobe rate as the baseline for the thing that you're measuring the strobe against. [00:27:55] Speaker 00: The other problem with their argument is that [00:27:57] Speaker 00: The whole point of strobe signals is that they are supposed to be synchronized with data because they signal that the data is present and valid. [00:28:05] Speaker 00: Their own expert at Appendix 1898 admitted that, quote, data strobes are in a one-to-one correspondence with data, end quote. [00:28:14] Speaker 00: And so again, it would not make sense to use the strobe cycle as the baseline to measure the data rate because the data rate would always be one because that's how strobe signals work. [00:28:25] Speaker 00: The board's analysis was spot on here. [00:28:28] Speaker 00: The board observed that under antecedent basis principles, the data rate has to be the same all the way through. [00:28:34] Speaker 00: And then the board made a factual finding at appendix 12 that Halbert's memory module outputs data to the system memory data bus at twice the rate that each of the ranks 140 and 142 outputs data. [00:28:49] Speaker 00: And the board expressly credited our expert's testimony about how Halbert works. [00:28:54] Speaker 00: Given the concession? [00:28:55] Speaker 03: They're right that the ratio between the data signal and the strobe signal is one to one. [00:29:01] Speaker 03: It's just that the strobe signal is different from the multiplexer, the controller, and the ranks to the multiplexer. [00:29:09] Speaker 00: They are correct about the factual point that the ratio between the data and the strobe signal is one to one on both sides of the multiplexer. [00:29:18] Speaker 00: Yes. [00:29:18] Speaker 00: My point is just that that is not a reasonable way to think about a data rate because, among other things, the claims require that the strobe be transmitted at the data rate as well. [00:29:30] Speaker 00: And so given this concession that the rates have to be the same, given the board's factual finding that in Halbert the rates are not the same, the board's decision is supported by substantial evidence and should be affirmed. [00:29:44] Speaker 00: If the court has further questions on any of the issues raised, I'm happy to address them. [00:29:49] Speaker 00: Otherwise, I'll cede the balance of my time. [00:29:51] Speaker 03: I think we're good. [00:29:52] Speaker 03: Thank you. [00:29:53] Speaker 00: OK. [00:29:53] Speaker 00: Thank you, Your Honors. [00:30:01] Speaker 03: Hello again, Your Honors. [00:30:04] Speaker 01: A couple of rebuttal points. [00:30:06] Speaker 01: One, my friend argued that, Mykron did not argue below, that Halbert's figure four discloses non-concurrent. [00:30:14] Speaker 01: I direct the board to at least the red brief here, where now it's submitted that Mykron, this is a quote, Mykron argued that Halbert's figure four is not limited to an embodiment where the rings operate concurrently. [00:30:26] Speaker 01: So they are saying something different in their briefing. [00:30:28] Speaker 01: Second, as I believe your honor may have indicated, there is no showing here that the board credits netless expert that Halbert only has a concurrent mode and not a non-concurrent mode. [00:30:41] Speaker 01: That finding was never made. [00:30:42] Speaker 01: The only finding here by the board is that Halbert does disclose a non-concurrent mode. [00:30:48] Speaker 01: Third, my friend said that our interpretation of pieces of data [00:30:55] Speaker 01: per strobe doesn't make sense because the claim recites transferring data and transferring data strobes at the specified data rate shows why our construction is correct. [00:31:06] Speaker 01: It wouldn't make sense to transfer data strobes at a rate of pieces of data per memory bus clock cycle. [00:31:13] Speaker 01: Pieces of data and strobes are different. [00:31:15] Speaker 01: The only way for the plain claim language to make sense is if you have a relationship between the data and the strobe, which is what we're showing in Halberd. [00:31:23] Speaker 01: One piece of data per strobe transferred at the ranks and also at the module. [00:31:29] Speaker 01: Here, we identified that in the petition. [00:31:31] Speaker 01: It was unrebutted. [00:31:32] Speaker 01: That's the important part is we identified that if a CTA would understand the intrinsic evidence supports it, Halbert says it, you can have a data per strobe rate. [00:31:41] Speaker 01: They didn't address it. [00:31:42] Speaker 01: The only thing that they did to address it is their expert admitted it. [00:31:46] Speaker 01: For DDR devices, you call that one piece of datum per strobe phase. [00:31:51] Speaker 01: Their expert admitted it. [00:31:52] Speaker 01: First time they're disputing this is on appeal. [00:31:56] Speaker 01: Second, for the 745 petition, you have industry-specified device, standardized devices, DDR, DRAMs in Halbert. [00:32:06] Speaker 01: You have the industry standard that says these things are configured to receive chip select signals. [00:32:12] Speaker 01: You have Halbert's Figure 2 showing that you have non-active and active chip select signals. [00:32:17] Speaker 01: The board made a factual finding that these would work [00:32:21] Speaker 01: right well with the non-concurrent mode that Halbert has, and that is unrebutted. [00:32:28] Speaker 01: Unless the panel has other questions, thank you for your time. [00:32:33] Speaker 03: Okay, thank you. [00:32:33] Speaker 03: Thank both counsel. [00:32:34] Speaker 03: The case is submitted.